Grenoble Area, France
Project Leader, System Architect & IC Designer
Transportation/Trucking/Railroad
Education
Polytech'Paris-UPMC 2001 — 2005
Engineer's Degree, Embedeed Software & Electronics
Université Pierre et Marie Curie (Paris VI) 2001 — 2005
Engineer, Electronics
National University of Singapore 2004 — 2004
Engineer, Digital Electronics
Experience
A.L.S.E August 2006 - Present
CS Communication & Systèmes September 2005 - August 2006
EADS Astrium January 2005 - August 2005
SNCF June 2004 - July 2004
Skills
Perl, RTL design, TCL, SoC, ARINC 429, AFDX, VHDL, Ethernet, Embedded Systems, Computer Architecture, Microcontrollers, SystemVerilog, Functional Verification, RTL coding, Linux, DSP, Altera, AHB, UVM, ASIC, Firmware, NCSim, Embedded Software, Processors, Static Timing Analysis, CPLD, FPGA, Digital Design, USB, Microprocessors, SystemC, VLSI, Device Drivers, Verilog, Windows, Logic Design, MIL-STD-1553, Digital Electronics, Primetime, Hardware Design, ModelSim, RTOS, System Architecture, C, PCIe, Embedded Linux, Xilinx, C++