Lyon Area, France
Engineer at Elsys Design
Semiconductors
Education
2008 — 2010
Master, Electronic systems for signal processing(SESIS)
2000 — 2004
Bachelor, Information Engineering
Experience
Elsys Design July 2012 - Present
ZTE May 2011 - February 2012
Nolam Embedded Systems, France March 2010 - September 2010
Infineon Technologies, Xi'an, China August 2004 - August 2008
Skills
SVN, Clearcase,..., SystemC, Verilog, Microsoft Office..., VHDL, ModelSim, CVE, NCSim,..., MATLAB, Embedded Systems, Assembly Language(DSP..., Lab equipments, C/C++, NCSim, Xilinx ISE, Quartus, TRACE32 debugger, SoC, Team management, Instrumentation, Makefile, VHDL/VHDL-AMS, ARM, UVM, Signal, Digital signal/image..., FPGA, Matlab, JTAG, RS-232, ARINC429,..., Unix, Linux, Windows, SystemVerilog