Munich Area, Germany
Head of SOC Design and Verification, Infineon Technologies
Semiconductors
Education
Johannes Kepler Universität Linz 1997 — 1999
PhD
Technische Universität München / TU Munich 1992 — 1997
Dipl. Phys. Univ.
Experience
Infineon Technologies 2011 - Present
Infineon Technologies 2007 - 2010
Qimonda 2004 - 2007
Infineon Technologies 2000 - 2004
Siemens Corporate R&D 1997 - 2000
Skills
Product Design, Timing, Physical Design, CMOS, Safety, Concepts, Processors, EDA, Microprocessors, Mixed Signal, SystemVerilog, Digital Circuit Design, VHDL, Logic Synthesis, iso 26262, Resource Management, SoC, Verilog, Team Management, Semiconductors, Strategic Hiring, Analog Circuit Design, Patents, Contractors, Modeling, Static Timing Analysis, ASIC, UVM, System Development..., IC, University Relations, ISO 26262, Automotive, Low-power Design, Hardware, Functional Verification, RTL Design, Management, Customer Experience, Integrated Circuit..., Embedded Systems, Simulations, People Management, Hardware Architecture, PLL, Electronics, TCL, RTL design, Project Management, VLSI