A Coruña Area, Spain
Ingeniero I+D en TRedess 2010
Telecommunications
Education
Universidad de Vigo 2001 — 2007
Licenciatura en Ingeniería Superior de Telecomunicaciones / Telecommunications Engineering, Área de Señal y Comunicaciones / Signal and Communications Area
Experience
TRedess 2010 September 2009 - Present
everis August 2007 - September 2009
Skills
Verilog, Software Documentation, English, Simulink, Software Development, VHDL-AMS, Python, Linux, Software Design, Computer Hardware, Verilog-A, AHDL, Software Engineering, PlanAhead, Nios II, OS X, Embedded Operating..., Xilinx, VHDL, Embedded Software, Matlab, Hardware Support, Hardware, XPS, Visual Studio, Embedded C, Embedded C++, Eclipse CDT, Altera Quartus, Microsoft Office, Hardware Architecture, Hardware Installation, Hardware Diagnostics, Verilog-AMS, VHDA, Embedded Linux, Linux Kernel, Open Office, Software Installation, Software Project..., Eclipse, Xilinx ISE