Ireland
Senior IC Physical Implementation Engineer | Aspiring Data Analyst
Semiconductors
Education
University College Dublin 2013 — 2014
GDEMP001-Graduate DiplomaStatistics (T188)
Université Blaise Pascal (Clermont-II) - Clermont-Ferrand 2000 — 2001
Engineer's Degree
Université Blaise Pascal (Clermont-II) - Clermont-Ferrand 1999 — 2000
Bachelor of Applied Science (B.A.Sc.)
Lycée Blaise Pascal Clermont Ferrand 1995 — 1999
Classe préparatoire aux grandes écoles.
Experience
IC Mask Design October 2014 - Present
University College Dublin September 2013 - August 2014
Samsung Cambridge Solution Centre June 2013 - August 2013
Toshiba Electronics Europe GmbH January 2013 - March 2013
Intel Corporation October 2011 - September 2012
Intel Corporation September 2005 - December 2011
Analog Devices February 2005 - August 2005
Dolphin Integration March 2001 - December 2004
Skills
Physical Design, IC Compiler, Low Power, Mixed Signal, Data, Physical Verification, DRC, SPICE, SoC, Cadence Skill, IC, Logic Synthesis, Integrated Circuit..., Microelectronics, Analysis, Primetime, EDA, SciPy, SQL, C++, Static Timing Analysis, Perl, TCL, Predictive Analytics, Cadence Virtuoso, Stochastic Modeling, DFT, Statistics, Synopsys tools, Data Analysis, RF, Statistical Data..., CTS, NumPy, ASIC, Floorplanning, Unix, Verilog, Synopsys, IC Layout, Python, Linux, DC Compiler, Statistical Analysis, R, Data Mining, LVS