Germany
Principal Digital Design Engineer at Dialog Semiconductor
Semiconductors
Education
Ecole supérieure de Chimie Physique Electronique de Lyon 1996 — 2002
Master of science in electrical engineering (MSEE), Department of electronics, signal processing and information technology.
Experience
Dialog Semiconductor January 2011 - Present
openMSP430 March 2009 - Present
ZMD AG July 2009 - December 2010
National Semiconductor November 2002 - March 2009
Xemics February 2002 - August 2002
Infineon June 2000 - August 2001
Skills
Formal Verification, RTL coding, DFT, Risk Assessment, CMOS, RTL design, SystemVerilog, Power Management, Digital Circuit Design, Timing Closure, Microcontrollers, Embedded Systems, Static Timing Analysis, ASIC, ARM, TCL, Microprocessors, Digital Design, Clocking, Low-power Design, EDA, Circuit Design, Logic Synthesis, FPGA, SoC, Functional Verification, Mixed Signal, Optimization, Hardware Architecture, Microelectronics, Risk Management, IC, MSP430, Verilog, Integrated Circuit..., NCSim, Semiconductors, VLSI, C, Analog, Cross-functional Team..., Debugging, Circuit Analysis, Processors, Primetime