Toulouse Area, France
Design Verification Manager at Freescale Semiconductor
Semiconductors
Education
Grenoble Ecole de Management - Grenoble Graduate School of Business 2010 — 2012
Master of Business Administration (MBA) with distinction, Innovation Management
Fachhochschule Furtwangen - Hochschule für Technik und Wirtschaft 2000 — 2002
Msc, Microsystems Engineering
Universidade Federal de Santa Catarina 1993 — 2000
Bsc, Electrical Engineering
Experience
Freescale Semiconductor January 2015 - Present
Freescale Semiconductor September 2013 - January 2015
Freescale Semiconductor November 2011 - September 2013
ST-Ericsson September 2007 - October 2011
Hyperstone February 2005 - August 2007
Philips Semiconductors May 2002 - February 2005
Infineon Technologies September 2001 - April 2002
Tribunal de Justiça de Santa Catarina 1995 - 2000
Skills
revision control systems, analog circuit modeling, RTL design, Verilog-AMS, Project Planning, Shell Scripting, ASIC, Assertion Based..., DFT, Python, TCL, Functional coverage, Integrated Circuit..., Mixed-Signal..., Hardware/Software..., DesignSync, Debugging, verification methodology, C, Team Leadership, Simulations, Microprocessors, Scan Insertion, Cadence Virtuoso, Microelectronics, Equivalence Checking, Static Timing Analysis, VHDL, Object Oriented Software, Leadership, Innovation Management, coverage-driven..., Regression Testing, Digital Design, Functional Verification, C/C++, CMOS, ATPG, Verilog, Logic Synthesis, SPI, Matlab, Management, UVM, Mixed Signal, Perl, SystemVerilog, Analog, Assembly, Electronics