Pordenone Area, Italy
Verification Engineer at EASIIIC
Industrial Automation
Education
Università degli Studi di Padova 2005 — 2006
Laurea magistrale, Ingegneria elettronica
Università degli Studi di Padova 1992 — 2004
Laurea, Ingegneria elettronica
Facoltà Teologica dell'Italia Settentrionale 1996 — 2002
Baccalaureato in Teologia, dogmatica, morale, esegesi, filosofia, psicologia, musica, liturgia
Liceo Scientifico 1987 — 1992
Diploma di Maturità, italiano, matematica, fisica, filosofia, scienze naturali, latino, inglese
Experience
Electronics for Innovation snc 2010 - Present
EASII-IC January 2014 - May 2014
PEGASUS MicroDesign s.r.l. 2012 - 2013
Intel Mobile Communications August 2012 - October 2012
STMicroelectronics 2012 - 2012
GME srl February 2007 - August 2010
Skills
FPGA, Quartus, Linux, Xilinx, SoC, Digital Electronics, ARM, Firmware, EDA, Electronics, Altera, Testing, PCB design, Assembly, Hardware, Simulation, Simulink, Microprocessors, SPI, USB, Matlab, C, DSP, Static Timing Analysis, Wireless, Debugging, I2C, Embedded Systems, Electrical Engineering, TCP/IP, Analog Circuit Design, Ethernet, Analog, Microcontrollers, Signal Integrity, Hardware Verification, Hardware Design, RTL coding, Functional Verification, VHDL, Mixed Signal, Digital Design, Signal Processing, Schematic Capture, Pspice, Analog Design, Verilog, SystemVerilog, System Design, Circuit Design