France
FPGA Engineer (Contractor)
Aviation & Aerospace
Education
ENSEIRB-MATMECA 2010 — 2013
Electronic Engineer, Electrical and Electronics Engineering
Bordeaux1 University 2012 — 2013
Master 2 in design and reliability of microelectronic circuits and systems
Lycée Montesquieu 2008 — 2010
CPGE-MP, Maths and Physics
Experience
Barco Silex August 2013 - April 2015
Scaleo chip February 2013 - July 2013
Institut für Mikroelektronische Systeme June 2012 - August 2012
Skills
French: Fluent, Cadence Virtuoso, Verilog, LabView, Orcad, Unix, Synplify Pro, Pspice, Synopsys Design Compiler, Formality, VHDL, Xilinx ISE, English: January 2012..., Labview, C-Shell, Tcl-Tk, ADS, C/C++, Spanish: Basic working..., ModelSim, Matlab, Simulink, Maple, Qt Creator, Perl, C++, German: Basic working..., Arabic: Fluent, MPLAB, Python, PSpice, PSIM, Synopsys Primetime PX, Ansoft Designer