Nice Area, France
Senior IC Physical Design Engineer
Telecommunications
Education
Polytech Nice Sophia-Antipolis 1994 — 1999
Engineer's degree, computing, electronic
Skema Business School
Master of Science in Management & Finance
Experience
Sondrel Ltd 2011 - Present
Texas Instruments 2001 - 2010
Mentor Graphics 1999 - 2001
Skills
PTSI, P&R, Clock Tree Synthesis, Logic Synthesis, Synopsys tools, Scan Insertion, Place & Route, Formality, ClearCase, Timing, IC, ModelSim, Microelectronics, Talus, Logic Design, Java, Star-RCXT, Equivalence Checking, ASIC, Digital Signal..., Power Management, Primetime, Timing Closure, Tcl-Tk, Semiconductors, Synopsys Primetime, VHDL, DFT, Physical Synthesis, VBA, Conformal LEC, Static Timing Analysis, Verilog, Magma, FPGA, Floorplanning, DRC, Digital IC Design, SoC, ATPG, Integrated Circuit..., Formal Verification, TCL, EDA, Physical Design, Digital Electronics